1. Field of the Invention
The present invention relates to prefetching techniques to improve the performance of computer programs. More specifically, the present invention relates to a method and an apparatus for using compiler-generated information to facilitate prefetching memory pages during execution of a computer program.
2. Related Art
Recent increases in microprocessor clock speeds have not been matched by corresponding increases in memory access speeds. Hence, the disparity between microprocessor clock speeds and memory access speeds continues to grow. Execution profiles for fast microprocessor systems show that a large fraction of execution time is spent, not within the microprocessor core, but within memory structures outside of the microprocessor core. This means that microprocessors spend a large fraction of time stalled waiting for memory references to complete instead of performing computational operations.
The time it takes to complete a memory access can vary greatly because of the significant differences in access speeds between levels of the memory hierarchy. Memory accesses to Level 1 (L1) caches are very fast and typically do not slow the processor down. On the other hand, if the memory access causes a miss in L1 cache, the memory system attempts to access the target memory item in Level 2 (L2) cache, which can take many processor cycles and is likely to cause the processor to stall. If the access to L2 cache causes a miss, the memory system attempts to retrieve the target memory item from main memory, which takes hundreds of cycles and is very likely to cause the processor to stall. Finally, if the reference to main memory causes a page fault because the target memory item is not located in memory, a memory page containing code or data may have to be retrieved from disk, which can take tens of thousands of processor cycles and is almost certain to cause the processor to stall.
In an effort to mitigate this slowdown, computer designers have implemented hardware mechanisms that implement elaborate policies for implicit page prefetching. While somewhat useful, these hardware mechanisms are expensive to implement and are imprecise when determining which pages to prefetch.
Hence, what is needed is a method and an apparatus for prefetching memory pages that without the problems described above.